Portapack-Carnage

◆ RCC_CFGR_PLLNODIV

#define RCC_CFGR_PLLNODIV   ((uint32_t)0x80000000)

#include <firmware/chibios/os/hal/platforms/STM32F0xx/stm32f0xx.h>

PLL is not divided to MCO (only for STM32F0XX_LD and STM32FO30X6 devices) ****************** Bit definition for RCC_CIR register